This thesis details the design of a processing chain and system software for a commensal radar system, that is, a radar that makes use of illuminators of opportunity to provide the transmitted waveform. The stages of data acquisition from receiver back-end, direct path interference and clutter suppression, range/Doppler processing and target detection are described and targeted to general purpose commercial off-the-shelf computing hardware. A detailed low level design of such a processing chain for commensal radar which includes both processing stages and processing stage interactions has, to date, not been presented in the Literature. Furthermore, a novel deployment configuration for a networked multi-site FM broadcast band commensal radar system is presented in which the reference and surveillance channels are recorded at separate locations.
The processing chain design reviews existing methods for each stage of the processing chain and proposes new approaches where appropriate. The algorithm implementation and greater processing chain integration is then presented for each respective stage to maximise processing and memory transport efficiency and in turn, the total throughput of the processing chain. Optimal signal processing techniques are targeted as far as possible to maximise signal to noise ratio and signal to interference ratios. Graphics processing units are exploited to accelerate highly parallel linear algebra operations which facilitates real-time throughput. The processing chain also provides automatic scaling to multiple graphics processing units when available to hinge maximum performance out of the available system hardware. Interfacing to subsequent stages of radar processing such as tracking are also provided along with testing of an implementation for non-coherent amplitude/range/Doppler map combination for when multiple frequency channels are exploited in the same bistatic geometry.
It is shown that with a single high-end Fermi-generation NVIDIA graphics card (Geforce GTX480) and a quad core CPU (AMD Phenom II X4 955) that real-time processing can be achieved for a single FM channel and bistatic pair and, furthermore, that this processing of 100% duty cycle of sample data occupies less than 25% of the available processing resources. Results are presented for multiple high-end gaming graphics processor units, a low cost, mid range unit, several cluster computing type units and an embedded graphics processor using to present a broad scope of performance of the processing chain on different hardware. It is also shown that the presented processing chain can be ported to a central processing unit only implementation albeit with a performance knock when compared to the graphics processor unit implementations.
Typical commensal systems make use of a pair of phase-synchronous receiver channels at every receiver site. One channel is fed from an antenna surveying a region of interest to receive target reflections while the second records a line of sight reference signal from the transmitter which is being exploited. The 2 signals are then cross correlated to resolve targets from the clutter. An analyses is presented of the performance and viability of digitising the reference signal(s) at a different location to that of the surveillance signal, recording only a single version of each channel to be exploited. The channel data is then distributed via data network to a processing node (or nodes) for the processing stage. This method removes the need to digitise a copy of the reference signal at each receiver node. As a result, receiver complexity will be reduced as well as the amount of front end equipment required at each receiver site. Furthermore, given that the surveillance and reference antennas are no longer connected to a common device it will allow the surveillance antenna to be placed at a location where direct path interference from the transmitter is minimised as a result of terrain screening. The extra suppression in interference is possible because a line of site reference signal is no longer required at the surveillance antenna site. By using the developed real-time processing chain it is shown that performance improvement can be achieved using this separated reference configuration by reducing the multipath in the reference channel by means of optimal antenna placement. This performance improvement can be achieved without any significant loss in coherency despite a 4 second integration time.