At the University of Cape Town, there are a range of undergraduate and postgraduate projects related to the prototyping of and experimenting with Software Defined Radio (SDR) and radar systems . Students often spend a large portion of their research time developing processing modules from scratch . Unfortunately, the fact that students spend much of their time building and integrating fundamental functional blocks, results in students not having sufficient time to devote to the main focus of their research .
High level abstraction at the design entry stage of a typical Field Programmable Gate Array (FPGA) design flow, has shown a reduction in the development time of complex systems . Such abstraction techniques, discussed in , include: graphical representations of system blocks; automatic code generation of parametric blocks and Intellectual Property (IP) reuse .
Many commercial Electronic Design Automation (EDA) products for FPGA development use graphical visualisations of Hardware Description Language (HDL) code to assist engineers . However, these tools usually don’t abstract clock or bus signals . Furthermore, reuse of HDL modules tends to involve much time spent connecting a range of commonly understood connectors. Automating these connection tasks could save time and simplify designs .
This dissertation presents a model-based rapid prototyping tool for use in SDR on a reconfigurable computing platform. The tool aims to facilitate a novice developer, student or researcher with the development of and experimentation with SDR processing applications deployed on a FPGA platform.
The developed tool, which integrates with Xilinx Platform Studio (XPS), is presented in this dissertation. The results, of testing the tool by implementing example designs, are also presented in this dissertation.