The advent of better and faster digital signal processing chips has led to digital implementation of many functions that have previously only been possible using analogue techniques. One such field is monopulse radar where available processing time is limited strictly to the radar pulse repetition frequency. The aim of this thesis is to design a signal processor using a Texas Instruments TMS320 C25 processor. This design is intended for monopulse radar systems using low pulse repetition frequencies.
Features typical to monopulse radar signal processing have been described here as system requirements. From this description a system specification, which is in fact the function design of the processor, has been developed. Prototype circuitry was then designed and built in order to test the feasibility of performing, within the required time, the functions outlined in the system specification. Following on from the results of the test, design of the hardware commenced.
The design was successfully completed. Although the TMS320 C25 was not found to be the ideal processor for this application, it is capable of performing the task within the required time. Careful consideration was given to the software design. A trade off between easily maintainable, high level language software, and high speed assembler had to be made. The final product is written in C but with critical procedures implemented in in-line assembler.
The thesis provides insight into the type of hardware and the level of signal processing required for low PRF monopulse signal processing.